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(R)
TDA7462
DUAL AUDIOPROCESSOR WITH COMPANDER AND SUBWOOFER OUTPUT
FULLY INTEGRATED AUDIOPROCESSOR 5 STEREO + 1 MONO INPUTS FOUR INDEPENDENT SPEAKER OUTPUTS DYNAMIC COMPRESSION STAGE FOR CD SUBWOOFER OUTPUT SOFTSTEP FEATURE FOR VOLUME VOICE-BAND FILTER DIRECT MUTE AND SOFTMUTE PAUSE DETECTOR FULLY PROGRAMMABLE BY I2C BUS INTERFACE DESCRIPTION The TDA7462 is a high performance audioprocessor with fully integrated audio filters. The digital control allows the programming of all filter characteristics in a wide range without the need of external components. New innovative features are included , a dynamic compression stage to BLOCK DIAGRAM
SO28 ORDERING NUMBER: TDA7462D
optimize audio response of CD sources an additional output channel for subwoofer and a separate source selector for rear channel. The use of a dedicated BICMOS process makes signal processing very linear thus achieving low distortion and low noise figures.
CD R+ CD L- CD L+ 8 7 9 10 11 1 2 13 12 3 4 28 27 REAR SELECTOR INPUT MULTIPLEXER + MIXING-STAGE IN-GAIN FRONT SELECTOR COMPANDER 6 5 IN-GAIN + AUTO ZERO
MUTE 26 SOFT MUTE VOICE-BANDPASS TREBLE BASS HP LP FRONT FADER FRONT FADER REAR FADER REAR FADER
22
CD RPDR PDGND PDL SE1L SE1R SE2R SE2L MD+ MDSEM/SE3L SE3R
LOUDNESS
VOLUME
OUT LF
21
OUT RF
19
OUT RR
LOUDNESS
20
OUT RL
18 SUBWOOFER LP MONO FADER SUBWOOFER OUT 17
SUBOUT+ SUBOUT-
PAUSE
23
25 PAUSE DETECT. BEEP DIGITAL CONTROL I2C BUS 24
SDA SCL
SUPPLY 16 VS 15 GND 14 CREF
D96AU864
November 2001
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TDA7462
ABSOLUTE MAXIMUM RATINGS
Symbol VS Tamb Tstg Operating Supply Voltage Operating Ambient Temperature Range Operating Storage Temperature Range Parameter Value 10.5 -40 to 85 -55 to 150 Unit V C C
SUPPLY
Symbol VS IS SVRR Parameter Supply Voltage Supply Current Ripple Rejection @ 1KHz VS = 9V Audioprocessor (all filters flat) Test Condition Min. 7.5 25 Typ. 9 30 60 Max. 10.2 35 Unit V mA dB
ESD All pins are protected against ESD according to the MIL883 standard. PIN CONNECTION
SE1L SE1R MD+ MDCDL+ CDLCDRCDR+ PDR PDGND PDL SE2L SE2R CREF
1 2 3 4 5 6 7 8 9 10 11 12 13 14
D98AU865
28 27 26 25 24 23 22 21 20 19 18 17 16 15
SE3L SE3R MUTE SDA SCL PAUSE OUTLF OUTRF OUTLR OUTRR SUBOUT+ SUBOUTVS GND
THERMAL DATA
Symbol Rth-j pins Parameter Thermal Resistance Junction-pins Max Value 85 Unit C/W
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TDA7462
PIN DESCRIPTION
N. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Name SE1L SE1R MD+ MDCDL+ CDLCDRCDR+ PDR PDGND PDL SE2L SE2R CREF GND VS SUBOUTSUBOUT+ OUTRR OUTLR OUTRF OUTLF PAUSE SCL SDA MUTE SE3R SE3L Single Ended Input 1 Left Channel Single Ended Input 1 Right Channel Mono Differenzial Input + Mono Differenzial Input CD Input Left Channel + CD Input Left Channel CD Input Right Channel CD Input Right Channel + Pseudo Differential Input Left Pseudo Differential Common Ground Pseudo Differential Input Right Single Ended Input 2 Left Channel Single Ended Input 2 Right Channel Stabilizer Capacitor Pin Supply Ground Supply Voltage Subwoofer Output Subwoofer Output + Speaker Output Right Rear Speaker Output Left Rear Speaker Output Right Front Speaker Output Left Front Pause Detector Output I2C bus clock I C bus data Softmute drive Single Ended Input 3 Right Channel Single Ended Input 3 Left Channel
2
Function
Type I I I I I I I I I I I I I S S S O O O O O O O I I/O I I I
Pin type legenda: I = Input O = Output I/O = Input/Output S = Supply
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ELECTRICAL CHARACTERISTICS (VS = 9V; Tamb = 25C; RL = 10K; all gains = 0dB; f = 1KHz; unless otherwise specified).
Symbol Parameter INPUT SELECTOR Rin Input Resistance VCL Clipping Level SIN Input Separation GIN MIN Min. Input Gain GIN MAX Max. Input Gain GSTEP Step Resolution VDC DC Steps Voffset Remaining offset with AutoZero DIFFERENTIAL CD STEREO INPUT Rin Input Resistance GCD Gain Test Condition all inputs except Phone Min. 70 2.2 80 -1 13 0.5 -5 -10 Typ. 100 2.6 100 0 15 1 1 6 0.5 100 0 -6 -12 70 60 9 55 70 60 9 100 70 60 350 780 1.56 0/ -3.5/-9.6 -6/-6 -12/-2.5 30 -83 0 -0.75 -4 32 -79.5 0.5 0 0 0.1 0.5 0.5 13 360 720 1 15 400 800 34 -75 1 0.75 3 2 3 5 1.5 17 440 880 Max. 130 Unit K VRMS dB dB dB dB mV mV mV K dB dB dB dB dB V K dB dB V K dB dB mV Hz KHz dB dB dB dB dB dB dB dB dB dB mV mV dB dB Hz Hz
Adjacent Gain Step GMIN to GMAX
1 17 1.5 5 10
Differential only at true differential input
CMRR
Common Mode Rejection Ratio
eN Output Noise @ Speaker Output DIFFERENTIAL MD INPUT Rin Input Resistance CMRR Common Mode Rejection Ratio eN Output Noise @ Speaker Output DIFFERENTIAL PHONE INPUT Rin Input Resistance CMRR Common Mode Rejection Ratio BEEP CONTROL VRMS Beep Level Lower Beep Frequency fBMIN fBMAX Higher Beep Frequency MIXING CONTROL MLEVEL Mixing Level
VCM = 1VRMS @ 1KHz VCM = 1VRMS @ 10KHz 20Hz to 20KHz flat; all stages 0dB Differential VCM = 1VRMS @ 1KHz VCM = 1VRMS @ 10KHz 20Hz to 20KHz flat; all stages 0dB Differential VCM = 1VRMS @ 1KHz VCM = 1VRMS @ 10KHz
70 -1 -5 -11 40 40
130 1 -7 -13
40 40 40
70
70 35 35 250 740 1.48
130
500 820 1.64
Main/Mix-Source
VOLUME CONTROL GMAX Max Gain AMAX Max Attenuation ASTEP Step Resolution EA Attenuation Set Error ET VDC Tracking Error DC Steps
G = -20 to 20dB G = -80 to -20dB Adjacent Attenuation Steps From 0dB to GMIN
LOUDNESS CONTROL ASTEP Step Resolution AMAX Max. Attenuation fCMIN Lower Center Frequency fCMAX Higher Center Frequency 4/25
TDA7462
ELECTRICAL CHARACTERISTICS (continued)
Symbol Parameter SOFT MUTE AMUTE Mute Attenuation TD Delay Time Test Condition Min. 80 T1 T2 T3 T4 Typ. 100 0.48 0.96 30.7 123 Max. Unit dB ms ms ms ms V V K ms ms ms ms ms ms ms ms 16 1.5 66 77 88 110 1.1 1.4 1.7 2.2 +1 6 15 3 12 15 18 21 -47 2 2 5 dB dB Hz Hz Hz Hz
20 70 2.5 70 TSW1 TSW2 TSW3 TSW4 TSW5 TSW6 TSW7 TSW8 14 0.5 54 63 72 90 0.9 1.1 1.3 1.8 -1 4 13 1 8 10 12 14 -53 0.5 80 -2
VTHlow VTHhigh RPD SOFT STEP TSW
Low Threshold for SM Pin1 High Threshold for SM Pin Internal Pull-up Resistor Switch Time
1 2 50 170 1 130
100 0.16 0.32 0.64 1.28 2.56 5.12 10.2 20.4 15 1 60 70 80 100 1 1.25 1.5 2 0 4.4 14 2 10 12.5 15 17.5 50 1 90 0.1
BASS CONTROL CRANGE Control Range ASTEP Step Resolution fC Center Frequency
QBASS
Quality Factor
DCGAIN
Bass-Dc-Gain
fC1 fC2 fC3 fC4 Q1 Q2 Q3 Q4 DC = off DC = on
dB dB dB dB KHz KHz KHz KHz dB dB dB dB mV
TREBLE CONTROL CRANGE Control Range ASTEP Step Resolution fC Center Frequency
fC1 fC2 fC3 fC4
SPEAKER ATTENUATORS CRANGE Control Range ASTEP Step Resolution AMUTE Output Mute Attenuation EE Attenuation Set Error VDC DC Steps
1) The SM pin is active low (Mute = 0)
Adjacent Attenuation Steps
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ELECTRICAL CHARACTERISTICS (continued)
Symbol Parameter FADER OUTPUTS VCLIP Clipping Level RL Output Load Resistance CL Output Load Capacitance ROUT Output Impedance VDC DC Voltage Level PAUSE DETECTOR VTH Zero Crossing Threshold Test Condition d = 0.3% Min. 2.2 2 Typ. 2.6 10 100 4.7 Max. Unit VRMS K nF V mV mV mV mV A V Hz Hz Hz Hz kHz kHz dB dB dB dB mV k k k k pF nF nF V V dB dB ms ms ms ms ms ms ms s VRMS
4.3 Window 1 Window 2 Window 3 Window 4 15
30 4.5 20 40 80 160 25 3.0 90 180 130 260 3 6 -50 1 90 1
IDELAY Pull-Up Current VTHP Pause Threshold VOICE BANDPASS fHP Highpass corner frequency
35
fLP
Lowpass corner frequency
fHP1 fHP2 fHP3 fHP4 fLP1 fLP2
81 162 117 234 2.7 5.4 -53 0.5 80
99 198 143 286 3.3 6.6 -47 1.5 2 5
SUBWOOFER ATTENUATORS CRANGE Control Range ASTEP Step Resolution 2 AMUTE Output Mute Attenuation EE Attenuation Set Error DC Steps VDC DIFFERENTIAL OUTPUTS Load resistance at each output RL RDL CL CLMAX CDLMAX Load resistance differential Capacitive load at each output Capacitive load at each output Capacitive load differential
Adjacent Attenuation Steps 1VRMS; AC coupled; THD = 1% 2VRMS; AC coupled; THD = 1% 1VRMS; AC coupled; THD = 1% 2VRMS; AC coupled; THD = 1% CLMIN at each Output to Ground C LMAX at each Output to Ground CLMAX between Output terminals Output muted 1 2 2 4
470 10 5 -10 4.3 30 4.5 6 19 23 6 12 24 49 195 390 780 1.56 0.5 0.5 10 100 4.7 15
DC Offset at pins VOffset ROUT Output Impedance VDC DC Voltage Level eNO Output Noise COMPANDER GMAX Max. Compander Gain tATT Attack time
Output muted Vi < -40dB tAtt1 tAtt2 tAtt3 tAtt4 tRel1 tRel2 tRel3 tRel4 1kHz sine-wave Output Signal/Input Signal
tRel
Release time
VREF CF
Compander Reference InputLevel (equals 0dB) Compression Factor
2) Steps are increasing if the attenuation is higher than 24dB.
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TDA7462
ELECTRICAL CHARACTERISTICS (continued)
Symbol GENERAL eNO Parameter Output Noise Test Condition BW = 20 Hz to 20 KHz output muted BW = 20 Hz to 20 KHz all gain = 0dB single ended inputs all gains = 0dB flat; VO = 2VRMS bass treble at 12dB; a-weighted; VO = 2.6VRMS VIN = 1VRMS; all stages 0dB VIN = 1VRMS; Bass & Treble = 12dB AV = 0 to -20dB AV = -20 to -60dB 80 -1 -2 Min. Typ. 3 10 Max. 15 20 Unit V V
S/N
Signal to Noise Ratio
106 100 0.005 0.05 100 0 0 0.1 0.1 1 2
dB dB % % dB dB dB
d SC ET
Distortion Channel separation Left/Right Total Tracking Error
MAIN FEATURES SUMMARY Input Multiplexer One fully differential CD stereo input with switchable attenuation One quasi-differential stereo input Three single-ended stereo inputs One1 differential mono input In-Gain 0..15dB, 1dB step Internal Offsetcancellation (AutoZero) Separate source selector for rear channel Beep Internal beep with 2 frequencies Mixing stage 4 step-mixing stage with phone or rear-selector as mix-signals Loudness Second order frequency response Programmable center frequency and quality factor 15 x 1dB attenuation steps Selectable flat-mode (constant attenuation) Volume 0.5dB attenuion step 80dB control range Soft-step control with programmable times Compander Dynamic range compression for use with CD source
2:1 compression rate Max. gain 15dB Bass 2nd order frequency response Center frequency programmable in 4 steps DC gain programmable 15 x 1dB steps Treble 2nd order frequency response Center frequency programmable in 4 steps 7 x 2dB steps Voice Bandpass 2nd order Butterworth highpass filter with programmable cut-off frequency 2nd order butterworth lowpass filter with programmable cut-off frequency Speaker Four independent speaker controls in 1dB steps Control range 50dB Separate Mute drive Subwoofer Differential mono output Control range 50dB 2nd order lowpass filter Mute Functions Direct mute
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Mute Functions Direct mute Digitally controlled softmute with 4 programmable mute times Pause Detector Programmable threshold Delay time defined by external capacitor FUNCTIONAL DESCRIPTION Input Stages Most of the input stages are similar to the others ST audioprocessors with exception of the CD inputs (see Figure 1). In fact there are some CD players in the market having a significant high source impedance which affects strongly on the common-mode rejection (CHRR) of the normal differential input stage. The additional buffer of the TDA7462 CD input avoids this drawback and
Figure 1. Input Stage
15K CD+ 100K CD100K 15K PD+ 100K PDGND 15K 28K MDGND + MD+ 28K SE1 100K 1 + 1 15K 1 +
15K
15K 15K
15K 28K
IN GAIN 28K
SE2 100K
SE3 100K
D98AU866
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TDA7462
offers the full common-mode rejection even with those CD players. AutoZero Stage In order to reduce the number of pins there is no AC coupling between the In-Gain and the following stage, so that any offset generated by or before the stage would be transferred or even amplified to the output. To avoid that effect, a special offset cancellation stage called AutoZero is implemented. This stage is located before the mixing block to eliminate all offsets generated by the input and the In-Gain (notice that externally generated offsets, e.g. generated through the leakage current of the coupling capacitors, are not cancelled). The auto-zeroing is started every time the databyte 0 is selected and takes a time of max. 0.3ms. To avoid audible clicking the audioprocessor is muted before the loudness stage during this time. Figure 2. Signal Flow of Mixing Stage. AutoZero Remain In some cases, for example if the P is executing a refresh cycle of the I2C bus programming, it is not useful to start a new AutoZero action because no new source is selected and an undesired mute would appear at the outputs. For such applications the TDA7462 could be switched in the AutoZeroRemain mode. If this bit is set to high, the databyte 0 could be loaded without invoking the AutoZero and the old adjustment value remains. Full Mixing Stage The four-level mixing stage offers the possibility to mix the rear selector signal or the phone signal to any other source. Due to the fact that the mixing stage is located after the In-Gain stage fine adjustments of the main source level could be done in this way.
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Figure 3. Loudness Attenuation @ fc = 400Hz (second order)
0.0
-5.0
grammable slope. The mute process can either be activated by the SoftMute pin(SM) or by the I2C bus. This slope is realized in a special Sshaped curve to mute slow in the critical regions (see Figure 6). For timing purposes the Bit 3 of the I2C bus output register is set to 1 from the start of muting until the end of de-muting. Figure 6. Softmute Timing
-10.0
-15.0
EXT. MUTE 1
-20.0 10.0 100.0 1.0K 10.0K
Figure 4. Loudness Center frequency @ Attn. = 15dB (second order)
0.0
+SIGNAL
REF
-SIGNAL
-5.0
1 I2C BUS OUT
-10.0
D97AU634
Time
-15.0
Note: Please notice that a started Mute action is always terminated and could not be interrupted by a change of the mute signal.
-20.0 10.0 100.0 1.0K 10.0K
Figure 5. Loudness @ Attn. = 15dB, fc = 400Hz
D98AU844
(dB)
SoftStep Volume When the volume level is changed audible clicks could appear at the output. The root cause of those clicks could either be a DC offset before the volume stage or the sudden change of the envelope of the audio signal. With the SoftStep feature both kinds of clicks could be reduced to a minimum and are no more audible. The blend time from one step to the next is programmable in four steps. Figure 7. Soft Step Timing
-5
VOUT
-10
2dB
1dB
-15
10ms -1dB Time
-20 10
100
1,000
Hz
-2dB
D97AU635
SoftMute The digitally controlled SoftMute stage allows muting/de-muting the signal with a I2C bus pro10/25
Note: For steps more than 1dB the softstep mode should be deactivated because it could generate a 1dB error during the blend-time
TDA7462
FILTER CHARACTERISTICS (BASS, TREBLE, VOICE-BAND) Figure 9. Bass Center @ Gain = 14dB, Q = 1
15.0 12.5 10.0 5.0 7.5 0.0 5.0 -5.0 2.5 -10.0 0.0 -15.0 10.0 100.0 1.0K 10.0K 10.0 100.0 1.0K 10.0K
Figure 8. Bass Control @ fc = 80Hz, Q = 1
15.0 10.0
Figure 10. Bass Quality factors @ Gain = 14dB, fc = 80Hz
15.0
Figure 11. Bass normal and DC Mode @ Gain = 14dB, fc = 80Hz
15.0 12.5
12.5 10.0 10.0 7.5 7.5 5.0 5.0 2.5 2.5 0.0 0.0 10.0 10.0 100.0 1.0K 10.0K 100.0 1.0K 10.0K
Note: The center frequency, Q and DC-mode can be set independently.
Figure 12. Treble Control @ fc = 17.5KHz
15.0 10.0 5.0 0.0 -5.0
Figure 13. Treble Center Frequencies @ Gain = 14dB
15.0 12.5 10.0 7.5 5.0 2.5
-10.0 0.0 -15.0 10.0 100.0 1.0K 10.0K 10.0 100.0 1.0K 10.0K
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TDA7462
Subwoofer Application Figure 14. Subwoofer Application with LPF 80/115Hz and HPF 90/130Hz
dB 0.0
VoiceBand Application Figure 15. VoiceBand Application with HPF 180/260Hz and LPF 3k/6kHz
dB 0.0
-10.0
-10.0
-20.0
-20.0
-30.0
-30.0
-40.0
-40.0
-50.0 10.0
100.0
1.0K
10.0K
Hz
-50.0 10.0
100.0
1.0K
10.0K
Hz
Figure 16. Switchable configuration for Front/Rear processing
80Hz/115Hz
Speaker Attenuator Due to practical aspects the steps in the speakerattenuators are not linear over the full range. At attenuations more than 24dB the steps increase from 1.5dB to 10dB (see data byte specification). Subwoofer The Subwoofer output is a differential mono output with 6dB gain. The outgoing signal generated
by adding the left and the right channel. The attenuator is exactely the same like the other speakers. In some applications it could be helpful to change the phase of this output by software. For this purpose a bit is available in the subwoofer byte to change the phase from 0 to 180.
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TDA7462
Compander Stage To achieve the desired compression characteristic like shown below the volume has to be decreased by 4dB. Figure 17. Compander Characteristics
dB 0
-10 -8dB 2:1 -20
soft slope between adjacent steps. As mentioned in the description of this stage it is not recommended to change the volume during this slope. The compander-hold bit (Bit 7 in the subaddressbyte) is present to implement the volume change more easily. The recommended sequence for changing the volume level when compander feature is on is the following: 1. Set the compander-hold bit 2. Wait the actual SoftStep time 3. Change the volume 4. Reset the compander-hold bit The SoftStep times are (in compander ON condition) automatically adapted to the attach time of the Compander. In the following table the related SoftStep times are shown:
Output Level
-38dB -30 15dB
-40
-50
-60 0 -10 -20 -30 -40 -50 -60
Attack-Time 6ms 12ms 24ms 48ms
SoftStep Time 0.16ms 0.32ms 0.64ms 1.28ms
Input Level
dB
When the compander is working a volume word coming from this stage is added to the I2C bus volume word and the volume is changed with a
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TDA7462
I2C BUS INTERFACE DESCRIPTION Interface Protocol The interface protocol comprises: - a start condition (S) - a chip address byte (the LSB bit determines
read / write transmission) - a subaddress byte - a sequence of data (N-bytes + acknowledge) - a stop condition (P) - the max. Clock Speed is 500kbits/s
CHIP ADDRESS 8 Bit MSB LSB MSB I2
SUBADDRESS 8 Bit LSB I1 I0 A3 A2 A1 A0 ACK
DATA 1 ... DATA n 8 Bit MSB DATA LSB ACK P
S 1 0 0 0 1 0 0 R/W ACK I3
S = Start R/W = "0" -> Receive Mode (Chip could be programmed by P) "1" -> Transmission Mode (Data could be received by P) ACK = Acknowledge P = Stop TRANSMITTED DATA (send mode)
The transmitted data is automatic updated after each ACK. Transmission can be repeated without new chipaddress. Reset Condition A Power On reset (POR) is invoked if the supply voltage is below than 3.5V. After that the following data is written automatically into the registers of all subaddresses:
MSB LSB 1 1 1 1 1 1 0
MSB X X X X ST SM X
LSB X
1
SM = Soft mute activated ST = Stereo X = Not Used
The programming after POR is marked bold-face / underlined in the programming tables. With this programming all the outputs are muted to VREF (VOUT = VDD/2).
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TDA7462
SUBADDRESS (receive mode)
MSB I3 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
1 2 3
LSB I2 I1 I0 A3 A2 A1 A0
FUNCTION Compander Hold1 off on AutoZero Remain2 off on Testmode3 off on Auto-Increment Mode4 off on Main Selector Main Loudness Volume Bass-Config./Treble Bass Speaker attenuator LF Speaker attenuator RF Rear Selector Rear Loudness Speaker attenuator LR Speaker attenuator RR Subwoofer SoftMute/Mixing Compander Configuration Testing
0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
For more information see Compander section For more information see AutoZero section For more information see Test Programming block 4 If this bit is set to "1", the subaddress is automatically incremented after the transmission of a data-byte. Therefore a transmission of more than one byte without sending the new subaddress is possible.
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TDA7462
DATA BYTE SPECIFICATION Main Selector
MSB D7 D6 D5 D4 D3 D2 0 0 0 0 1 1 1 1 1 1 : 0 0 0 1 1 1 : 0 0 1 1 : 0 0 1 0 : 1 0 D1 0 0 1 1 0 0 1 1 LSB D0 0 1 0 1 0 1 0 1 Source Selector Mono Differential Single Ended 1 Full Differential Single Ended 2 Pseudo Differential Single Ended 3 Mute beep Input Gain 15dB 14dB : 1dB 0dB Pause Source Selector Single Ended 3 Pseudo Differential FUNCTION
Main Loudness
MSB D7 D6 D5 D4 D3 0 0 : 1 1 0 1 0 1 0 1 0 1 D2 0 0 : 1 1 D1 0 0 : 1 1 LSB D0 0 1 : 0 1 Attenuation 0dB -1dB : -14dB -15dB Filter on off (flat) Center Frequency 400Hz 800Hz Loudness Q First order Second order SoftStep Volume off on LOUDNESS
Note: The attenuation is specified at high frequencies. Around the center frequency the value is different depending on the programmed attenuation (see Loudness frequency response).
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TDA7462
Volume MSB
D7 0 0 : 0 0 0 : 0 0 0 : 1 1 D6 0 0 : 0 0 0 : 0 1 1 : 1 1 D5 0 0 : 0 0 0 : 1 0 0 : 0 0 D4 0 0 : 1 1 1 : 1 0 0 : 1 1 D3 0 0 : 1 1 1 : 1 0 0 : 1 1 D2 0 0 : 0 0 0 : 1 0 0 : 1 1 D1 0 0 : 0 0 1 : 1 0 0 : 1 1
LSB
D0 0 1 : 0 1 0 : 1 0 1 : 0 1
ATTENUATION Gain/Attenuation +32.0dB (Note) +31.5dB : +20.0dB +19.5dB +19.0dB : +0.5dB 0.0dB - 0.5dB : -79.0dB -79.5dB
Note: It is not recommended to use a gain more than 20dB for system performance reason. In general, the max. gain should be limited by software to the maximum value, which is needed for the system.
Bass Configuration. & Treble Programming
MSB D7 D6 D5 D4 D3 0 0 : 0 0 1 1 : 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 D2 0 0 : 1 1 1 1 : 0 0 D1 0 0 : 1 1 1 1 : 0 0 LSB D0 0 1 : 0 1 1 0 : 1 0 Treble Steps -14dB -12dB : -2dB 0dB 0dB +2dB : +12dB +14dB Treble Center Frequency 10.kHz 12.5kHz 15.0kHz 17.5kHz Bass Center Frequency 60Hz 70Hz 80Hz 100Hz BASS & TREBLE ATTENUATION
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Bass Programming
MSB D7 D6 D5 D4 0 0 : 0 0 1 1 : 1 1 0 0 1 1 0 1
Note: For more information please refer to section Bass description
LSB D3 0 0 : 1 1 1 1 : 0 0 D2 0 0 : 1 1 1 1 : 0 0 D1 0 0 : 1 1 1 1 : 0 0 D0 0 0 : 0 1 1 0 : 1 0
BASS ATTENUATION Bass Steps -15dB -14dB : -1 dB 0 dB 0 dB +1 dB : +14dB +15dB Bass Q Factor 1 1.25 1.5 2 Bass DC-Mode off on
0 1 0 1
Speaker Attenuation Front (left & right channel)
MSB D7 D6 D5 0 0 : 0 0 0 0 0 0 0 0 0 1 0 1
For this Bass Center-Frequency must be programmed to 100Hz
LSB D4 0 0 : 1 1 1 1 1 1 1 1 1 D3 0 0 : 0 1 1 1 1 1 1 1 1 D2 0 0 : 1 0 0 0 0 1 1 1 1 D1 0 0 : 1 0 0 1 1 0 0 1 1 D0 0 1 : 1 0 1 0 1 0 1 0 1
ATTENUATION/BASS CF Attenuation 0dB -1dB : -23dB -24.5dB -26dB -28dB -30dB -32dB -35dB -40dB -50dB Speaker Mute Bass Center-Frequency (only Speaker LF) 1) Bass 150Hz Bass 100Hz
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TDA7462
Rear Selector MSB
D7 D6 D5 D4 D3 D2 0 0 0 0 1 1 1 1 1 1 : 0 0 1 1 1 : 0 0 1 1 : 0 0 1 0 : 1 0 D1 0 0 1 1 0 0 1 1 LSB D0 0 1 0 1 0 1 0 1 Source Selector Mono Differential Single Ended 1 Full Differential Single Ended 2 Pseudo Differential Single Ended 3 Mute Beep Input Gain 15dB 14dB : 1dB 0dB must be "1" FUNCTION
Rear Loudness
MSB D7 D6 D5 D4 D3 0 0 : 1 1 0 1 0 1 0 1 0 1 D2 0 0 : 1 1 D1 0 0 : 1 1 LSB D0 0 0 : 1 1 Attenuation 0dB -1dB : -14dB -15dB Filter on off Center Frequency 400Hz 800Hz Loudness Order First Order Second Order Beep Frequency 781Hz 1.56kHz FUNCTION
Note: The programming of the Main- and Rear-Selector as well as the Main- and Rear-Loudness is exactly the same, except the MSB's.
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TDA7462
Speaker Attenuation Rear (left & right channel)
MSB D7 D6 D5 0 0 : 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1
1) 2)
LSB D4 0 0 : 1 1 1 1 1 1 1 1 1 D3 0 0 : 0 1 1 1 1 1 1 1 1 D2 0 0 : 1 0 0 0 0 1 1 1 1 D1 0 0 : 1 0 0 1 1 0 0 1 1 D0 0 1 : 1 0 1 0 1 0 1 0 1
FUNCTION Atenuation 0dB -1dB : -23dB -24.5dB -26dB -28dB -30dB -32dB -35dB -40dB -50dB Speaker Mute Input Signal for Rear Speaker (only Spkr LR)1) Rear Channel Main Channel Subw. Low-Pass Frequency (only Spkr RR) 80Hz 115Hz Input Signal for Subwoofer (only Spkr RR)2) Rear Channel Main Channel
see Figure 16 Switch RearSel see Figure 16 Switch SubwSel
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TDA7462
Subwoofer MSB
D7 D6 D5 0 0 : 0 0 0 0 0 0 0 0 0 1 0 1 0 1 D4 0 0 : 1 1 1 1 1 1 1 1 1 D3 0 0 : 0 1 1 1 1 1 1 1 1 D2 0 0 : 1 0 0 0 0 1 1 1 1 D1 0 0 : 1 0 0 1 1 0 0 1 1 LSB D0 0 1 : 1 0 1 0 1 0 1 0 1 Attenuation 0dB -1dB : -23dB -24.5dB -26dB -28dB -30dB -32dB -35dB -40dB -50dB Speaker Mute Subwoofer Phase 180 0 Subwoofer Low-Pass Filter off on FUNCTION
SoftMute and Mixing
MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 0 1 0 0 1 1 0 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 Mute enable SoftMute disable SoftMute Mute Times 0.48ms 0.96ms 30.7ms 122.8ms Mixing Source Rear-Selector Phone Mixing Level (Main/Mix-Source) -12/-2.5dB -6/-6dB -3.5/-9.6dB 0/ CD Full-Differential Gain -12dB -6dB -6dB 0dB FUNCTION
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TDA7462
Compander
MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 0 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 0 1 0 1
1) Only possible if the Compander is off (Bit D0 set to 0)
FUNCTION Activity off on Attack Times 6ms 12ms 24ms 49ms Release Times 195ms 390ms 780ms 1.56s SoftStep Time 1) 160s 320s 640s 1.28ms 2.56ms 5.12ms 10.2ms 20.4ms Max. Compander Gain 23dB 19dB Compander Input Rear Selector (after Rear InGain) Front Selector (after Front InGain)
0 1 0 1
0 1 0 1 0 0 1 1 0 1 0 1
0 0 1 1
0 1 0 1
Configuration
MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 0 1 0 0 1 1 0 1 0 1 0 1 0 0 1 1 22/25 0 1 0 1 0 1 0 1 Pause Detector off on Pause ZC Window 160mV 80mV 40mV 20mV Voice-Band Low-Pass Enable Filter off Filter on Voice-Band Low-Pass Frequency 3kHz 6kHz Voice-Band High-Pass Enable Filter off Filter on High-Pass Cut-Off-Frequency 90Hz 180Hz 130Hz 260Hz FUNCTION
TDA7462
Testing
MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 0 1 0 0 0 0 1 1 1 1 0 1 0 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Main Testmode Switch 1) off on Test Multiplexer Compander Log-Amp. Output Compander Low-Pass Output Compander DAC Output internal 200kHz Clock not allowed not allowed internal Bandgap Voltage not allowed Compander Testmode off on Clock external internal must be "1" FUNCTION
1) To avoid inadvertently programming of the Main-Testmode as well the Compander testmode it is mandatory to set the Bit 5 in the subaddress-byte to high at the same time.
Figure 18. Application Circuit.
STDL STDR 10F 100nF 10F SE2L CREF 14 12 100nF SE2R 13 GND 15 100nF 16 22 21 20 2 19 VS + = VCC
- 9V
OUTLF OUTRF OUTLR OUTRR 100nF
OUTLF OUTRF OUTLR OUTRR
100nF TAPEL 100nF TAPER 100nF PHONE+ 100nF PHONE100nF CDL+ 100nF CDL100nF CDR100nF CDR+
SE1L
1
SE1R
MD+
3
18
SUBOUT+
SUBOUT+ 100nF SUBOUT-
MD-
4
17
SUBOUT-
CDL+
5
25 24 26 28
SDA SCL MUTE SE3L 100nF
SDA SCL SM AMMONO
CDL-
6
CDR-
7
CDR+
8 9 PDR 100nF PDGND 22F 10 PDL 100nF 11 23
27
SE3R
PAUSE PAUSE 47nF
D98AU867
EXTR
EXTGND
EXTL
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TDA7462
DIM. MIN. A a1 b b1 C c1 D E e e3 F L S 7.4 0.4 17.7 10 0.1 0.35 0.23
mm TYP. MAX. 2.65 0.3 0.49 0.32 0.5 45 (typ.) 18.1 10.65 1.27 16.51 7.6 1.27 0.291 0.016 0.697 0.394 0.004 0.014 0.009 MIN.
inch TYP. MAX. 0.104 0.012 0.019 0.013 0.020
OUTLINE AND MECHANICAL DATA
0.713 0.419 0.050 0.65 0.299 0.050
SO28
8 (max.)
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TDA7462
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com
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